high-level synthesis
high-level synthesis noun: a design method that automatically transforms an algorithmic or behavioral description of a digital system, written in a high-level language such as C or C++, into a register-transfer level hardware description suitable for FPGA or ASIC implementation.
Noun
high-level synthesis
- A design method that automatically transforms an algorithmic or behavioral description of a digital system, written in a high-level language such as C or C++, into a register-transfer level hardware description suitable for FPGA or ASIC implementation.
- Synonyms:
- HLS
Synonyms of high-level synthesis
Questions about high-level synthesis
- What does high-level synthesis mean?
- High-level synthesis means a design method that automatically transforms an algorithmic or behavioral description of a digital system, written in a high-level language such as C or C++, into a register-transfer level hardware description suitable for FPGA or ASIC implementation.
- What part of speech is high-level synthesis?
- High-level synthesis is a noun.
Words near high-level synthesis in the dictionary
Source and license
Adapted from Wiktionary: high-level synthesis (page history and authors). Text available under the Creative Commons Attribution-ShareAlike 4.0 license. Word.ws reformatted the entry and added links. Wiktionary data of 2026-09-02.
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Cite this entry: “high-level synthesis.” Word.ws, https://word.ws/high-level_synthesis. Based on Wiktionary, CC BY-SA 4.0.
